Cache-memory system having multidimensional spread cache

Details Cache-memory system having multidimensional spread cache Cache-memory system having multidimensional spread cache

1996-11-26

1998-05-05

Chan, Eddie P.

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

711118, 711 3, G06F 1206

Patent

active

057490899

ABSTRACT:
Graphic data having a two-dimensional spread is divided into data blocks having a two-dimensional spread, for example, data blocks of 8.times.8 pixels, and with these data blocks as units, cache control is performed. A tag memory for making a decision as to the occurrence of a cache hit, stores therein a tag and a valid flag as well as a bank address in a cache memory at which the data block in question is stored. As a result, the relationship between each bank of the cache memory and the address in the tag memory is not fixed, which ensures efficient use of the cache memory even in situations where accesses concentrate in one particular memory area.

REFERENCES:
patent: 4197580 (1980-04-01), Chang et al.
patent: 5428725 (1995-06-01), Sugai et al.
Article: "4-Megabit Block Random-Access Memory TMS92060 (5 V)" with translation*.
Article: "Block Random-Access Memory" with translation.
Hennessy et al, "Computer Architecture A Quantitative Approach", 1990, pp. 408-425.

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