Cache-memory system having multidimensional cache

Details Cache-memory system having multidimensional cache Cache-memory system having multidimensional cache

1996-06-10

1998-10-13

Chan, Eddie P.

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

711213, 711129, G06F 1208

Patent

active

058227601

ABSTRACT:
A prediction block address is generated from a current block address in accordance with a rule specified by a prediction mode signal. One of two cache memory banks is allocated as a current bank and the other is allocated as a prediction bank. When the current block address is stored in the prediction bank, the allocation of the current and prediction banks is reversed. When the prediction block address is not stored in the prediction bank, a data block specified by the prediction block address is block-read into the prediction bank.

REFERENCES:
patent: 4197580 (1980-04-01), Chang et al.
patent: 5287487 (1994-02-01), Priem et al.
Handy, "The Cache Memory Bank", 1993, pp. 49-52.
"Block Random-Access Memory" Texas Instruments, 1994, pp. 1-20. (With translation).
"4-Megabit Block Random-Access Memory TMS 92060 (5V)", Nov. 10, 1994, pp. 1-22. (With translation).
Hennessy et al., Computer Architecture: A Quantitative Approach, Chapter 8.3 --"Caches", 1990, pp. 408-425.

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