Cache memory system and method using reference bits

Details Cache memory system and method using reference bits Cache memory system and method using reference bits

2003-06-02

2008-05-20

Peikari, B. James (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S156000

Reexamination Certificate

active

07376797

ABSTRACT:
A cache memory system includes a cache memory having a plurality of entries associated with a plurality of information storage units. Each of the information storage units is configured to store part of the information stored in a main memory. Reference bit storage units store a use status of entry data for a certain period of time. A hit detection circuit is connected to the information storage units. The hit detection circuit generates a hit signal to each of the reference bit storage units when the entry data is determined to satisfy use conditions.

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