Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2011-03-08
2011-03-08
Gu, Shawn X (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S119000, C711S128000, C711S133000, C711S144000, C711SE12016
Reexamination Certificate
active
07904675
ABSTRACT:
A cache memory has a set associative scheme and includes a plurality of ways made up of entries, each entry holding data and a tag; a first holding unit holds, for each way, a priority attribute that indicates a type of data to be preferentially stored in that way; a second holding unit, included in a first way among the ways, holds, for each entry of the first way, a data attribute that indicates a type of data held in that entry; and a control unit replaces control on the entries by prioritizing a way whose priority attribute held by the first holding unit matches a data attribute outputted from a processor, wherein the control unit is further operable to store data into the entry of the way other than the first way.
REFERENCES:
patent: 5906000 (1999-05-01), Abe et al.
patent: 6038647 (2000-03-01), Shimizu
patent: 6687790 (2004-02-01), Zager et al.
patent: 6725334 (2004-04-01), Barroso et al.
patent: 7287123 (2007-10-01), Yoshioka
patent: 7574572 (2009-08-01), Yoshioka
patent: 2003/0014595 (2003-01-01), Doteguchi et al.
patent: 2003/0131196 (2003-07-01), Park et al.
patent: 2004/0034740 (2004-02-01), Britton et al.
patent: 2007/0136530 (2007-06-01), Tanaka
patent: 0 322 888 (1989-07-01), None
patent: 0 442 474 (1991-08-01), None
patent: 62-144257 (1987-06-01), None
patent: 01-173241 (1989-07-01), None
patent: 03-235144 (1991-10-01), None
patent: 04-100158 (1992-04-01), None
patent: 07-200412 (1995-08-01), None
patent: 09-160828 (1997-06-01), None
patent: 09-237225 (1997-09-01), None
patent: 11-259362 (1999-09-01), None
patent: 2002-342163 (2002-11-01), None
patent: 2003-030047 (2003-01-01), None
patent: 2004-078944 (2004-03-01), None
patent: 2004-110240 (2004-04-01), None
patent: 2004-145780 (2004-05-01), None
patent: 2004-326187 (2004-11-01), None
patent: 2005/048112 (2005-05-01), None
Notice of Allowance and Notice of Allowability dated Apr. 7, 2009 for U.S. Appl. No. 11/898,601.
Notice of Allowance and Notice of Allowability dated Jun. 13, 2007 for U.S. Appl. No. 11/137,560.
Office Action dated Aug. 1, 2008 for U.S. Appl. No. 11/898,601.
Office Action dated Jan. 5, 2009 for U.S. Appl. No. 11/898,601.
Gu Shawn X
Panasonic Corporation
Wenderoth , Lind & Ponack, L.L.P.
LandOfFree
Cache memory, system, and method of storing data does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Cache memory, system, and method of storing data, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Cache memory, system, and method of storing data will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2713429