Cache memory system allowing concurrent reads and writes to...

Details Cache memory system allowing concurrent reads and writes to... Cache memory system allowing concurrent reads and writes to...

2005-05-31

2005-05-31

Nguyen, T (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Access timing

C711S118000, C711S154000, C711S155000

Reexamination Certificate

active

06901495

ABSTRACT:
A cache memory includes a plurality of memory chips, or other separately addressable memory sections, which are configured to collectively store a plurality of cache lines. Each cache line includes data and an associated cache tag. The cache tag may include an address tag which identifies the line as well as state information indicating the coherency state for the line. Each cache line is stored across the memory chips in a row formed by corresponding entries (i.e., entries accessed using the same index address). The plurality of cache lines is grouped into separate subsets based on index addresses, thereby forming several separate classes of cache lines. The cache tags associated with cache lines of different classes are stored in different memory chips. During operation, the cache controller may receive multiple snoop requests corresponding to, for example, transactions initiated by various processors. The cache controller is configured to concurrently access the cache tags of multiple lines in response to the snoop requests if the lines correspond to differing classes.

REFERENCES:
patent: 5488709 (1996-01-01), Chan
patent: 5524212 (1996-06-01), Somani et al.
patent: 5644753 (1997-07-01), Ebrahim et al.
patent: 5732241 (1998-03-01), Chan
patent: 5930819 (1999-07-01), Hetherington et al.
patent: 6061766 (2000-05-01), Lynch et al.
patent: 6076147 (2000-06-01), Lynch et al.
patent: 6081873 (2000-06-01), Hetherington et al.
patent: 0365281 (1990-04-01), None

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