Cache memory device and manufacturing method thereof

Details Cache memory device and manufacturing method thereof Cache memory device and manufacturing method thereof

1996-07-10

1998-02-17

Nguyen, Tan T.

Static information storage and retrieval

Associative memories

Ferroelectric cell

36518905, G11C 1504

Patent

active

057198047

ABSTRACT:
A method is for manufacturing a cache memory device for writing cache data into and reading cache data from a storing region of a memory cell array designated according to a portion of an address signal and a selection signal from a 1/2 multiplexer. In a first step of the method, a common base of the 1/2 multiplexer applicable to both a direct-map type cache memory device and a set-associative type cache memory device is manufactured. Then, in a second step of the method, one of the direct-map type cache memory device and the set-associative type cache memory device is manufactured using the common base of the 1/2 multiplexer. The 1/2 multiplexer included in the direct-map type cache memory device outputs another portion of the address signal as the selection signal, and the 1/2 multiplexer included in the set-associative type cache memory device selectively outputs one of a write way signal and a read way signal as the selection signal according to a write enable signal.

REFERENCES:
patent: 5029126 (1991-07-01), Yamaguchi
patent: 5226009 (1993-07-01), Arimoto
patent: 5450565 (1995-09-01), Nadir et al.

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