Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-03-21
2006-03-21
Bragdon, Reginald G. (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S139000, C711S138000, C711S128000
Reexamination Certificate
active
07017009
ABSTRACT:
A cache memory device with a cache section, which is provided between a CPU and a main memory and operates as a fast buffer memory, has a capability of storing input data in the cache section when attribute information affixed to the input data indicates a predetermined attribute.
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patent: 5963981 (1999-10-01), Martin
patent: 6526483 (2003-02-01), Cho et al.
Intel, “Pentium Processor User's Manual vol. 2: 82496 Cache Controller and 82491 Cache SRAM Data Book”, Intel Corp. 1993, pp. 1-9, 1-14, 2-1, 3-8, and 4-5 to 4-6.
Bragdon Reginald G.
NEC Electronics Corporation
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