Cache memory control circuit and processor

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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Details

C711SE12052

Reexamination Certificate

active

08065486

ABSTRACT:
A cache memory control circuit includes a selecting section configured to be capable of selecting, in a predetermined order, each way or a predetermined two or more ways of a cache memory having multiple ways; a comparing section configured to detect a cache hit in each way; and a control section configured to, upon detection of a cache hit, stop a selection of the respective ways or the predetermined two or more ways at the selecting section.

REFERENCES:
patent: 5802594 (1998-09-01), Wong et al.
patent: 6185657 (2001-02-01), Moyer
patent: 2006/0090034 (2006-04-01), Ishihara et al.
patent: 8-263370 (1996-10-01), None
patent: 2002-236616 (2002-08-01), None
U.S. Appl. No. 12/399,463, filed Mar. 6, 2009, Toshio Fujisawa.

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