Cache memory and method to maintain cache-coherence between...

Details Cache memory and method to maintain cache-coherence between... Cache memory and method to maintain cache-coherence between...

2008-09-23

2008-09-23

Lane, Jack A (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S122000, C711S141000

Reexamination Certificate

active

10998561

ABSTRACT:
A cache memory includes a first-level cache-memory unit that stores data; a second-level cache-memory unit that stores data that is same as the data stored in the first-level cache-memory unit; a storage unit that stores a part of information relating to the first-level cache-memory unit; and a coherence maintaining unit that maintains cache-coherence between the first-level cache-memory unit and the second-level cache-memory unit based on information stored in the storage unit.

REFERENCES:
patent: 5003459 (1991-03-01), Ramanujan et al.
patent: 5668968 (1997-09-01), Wu
patent: 5694573 (1997-12-01), Cheong et al.
patent: 6115794 (2000-09-01), Arimilli et al.
patent: 6804799 (2004-10-01), Zuraski, Jr.
patent: 2002/0199151 (2002-12-01), Zuraski, Jr.
patent: 8-235061 (1996-09-01), None
patent: 10-301850 (1998-11-01), None
patent: 2002-055881 (2002-02-01), None
European Search Report, mailed Apr. 17, 2008 and issued in corresponding European Patent Application No. 04257443.4-1229.

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