Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-08-30
2005-08-30
Moazzami, Nasser (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S118000, C711S128000, C711S137000, C711S204000, C712S205000, C712S207000, C712S237000, C712S239000
Reexamination Certificate
active
06938126
ABSTRACT:
A method, apparatus, and system that compares a current fetch request having a first start address and length associated with the current fetch request to a second start address of the next fetch request, determines whether the content already loaded in a buffer will be used to at least partially fulfill the next fetch request based upon the comparison, and inhibits access to an instruction cache based upon the comparison.
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Grochowski Edward
Ramirez Alejandro
Shen John
Wang Hong
Blakely Sokoloff Taylor and Zafman
Dinh Ngoc V
Moazzami Nasser
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