Cache line reservations

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring

Reexamination Certificate

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Reexamination Certificate

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07937552

ABSTRACT:
Illustrative embodiments provide a computer implemented method, an apparatus in the form of a data processing system and a computer program product for cache line reservations. In one embodiment, the computer implemented method comprises, dividing a memory into an unreserved section and a set of reserved sections. The method performs selected allocations of the memory only from the set of reserved sections, and performing un-selected allocations of the memory from the unreserved section. The method further mapping a specified selected allocation of the memory to a same corresponding line of cache memory each time the mapping for the specified selected allocation of the memory occurs, thereby maintaining locality.

REFERENCES:
patent: 6321240 (2001-11-01), Chilimbi et al.
patent: 6848026 (2005-01-01), DeSota et al.
patent: 2006/0259691 (2006-11-01), Jeremiassen
patent: 1363193 (2003-11-01), None

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