Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2011-02-15
2011-02-15
Shah, Sanjiv (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S118000, C711S122000, C711S165000, C711S119000
Reexamination Certificate
active
07890703
ABSTRACT:
A system, method, and a computer readable for inserting data into a cache memory based on information in a semi-synchronous memory copy instruction are disclosed. The method comprises determining a start of a semi-synchronous memory copy operation. The semi-synchronous memory copy operation is checked for a given value in at least one cache injection bit. In response to the given value in the cache injection bit, a predefined number of lines of destination data is copied into at least one level of cache memory.
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Arimilli Ravi K.
Govindaraju Rama K.
Hochschild Peter H.
Mealey Bruce G.
Sharma Satya P.
Fleit Gibbons Gutman Bongini & Bianco PL
Gibbons Jon A.
International Business Machines - Corporation
Rojas Midys
Shah Sanjiv
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