Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-01-17
2006-01-17
Vital, Pierre M. (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S167000
Reexamination Certificate
active
06988169
ABSTRACT:
A system and method for reducing data transfer latency and network-induced jitter in computer networks that can handle the transfer of large object data types such as multimedia objects without requiring a large local object store. The system includes a cache memory system coupled between a data consumer and a data provider. The cache memory system includes a jitter buffer and a local object store, each of which is configured to store at least a portion of a requested data object. The cache memory system satisfies the low-latency and low-jitter data feed requirements of the data consumer by delivering initial bytes of the requested data object from the local object store to the data consumer while pre-fetching remaining object data bytes from the data provider using the jitter buffer. The cache memory system then, at least at some times, fetches additional remaining object data bytes from the data provider using the jitter buffer and delivers the additional remaining object data bytes to the data consumer. The system can be used to retrieve, store, and deliver both real-time and non-real-time multimedia objects.
REFERENCES:
patent: 2002/0046307 (2002-04-01), Treggiden
patent: 2002/0103928 (2002-08-01), Singal et al.
Florida Center for Instructional Technology, “An Educator's Guide to School Networks”, http://fcit.usf.edu
etwork, 1999, Chap. 5.
Andrew S. Tanenbaum, Structured Computer Organization, 4thed., Prentice Hall Inc., 1999, p 8.
Proxy Prefix Caching for Multimedia Streams, Subhabrata Sen, et al., 0-7803-5420-6/99, 1999 IEEE, pp. 1-10.
Burger Eric W.
McNiff Bradley James
Womer Matthew D.
Snowshore Networks, Inc.
Vital Pierre M.
Weingarten Schurgin, Gagnebin & Lebovici LLP
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