Cache for a host controller to store command header information

Details Cache for a host controller to store command header information Cache for a host controller to store command header information

2007-06-26

2010-11-30

Chery, Mardochee (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S154000, C711SE12026, C710S036000, C710S040000

Reexamination Certificate

active

07844777

ABSTRACT:
In one embodiment, the present invention includes a host controller having a cache memory to store entries each including, at least, a command header (CH) portion having data associated with a command from the host controller to one of multiple devices coupled to a port multiplier, and a physical region descriptor (PRD) portion to store address information associated with a next address for data transfer with regard to the command. Other embodiments are described and claimed.

REFERENCES:
patent: 5987595 (1999-11-01), Yoaz et al.
patent: 2005/0102555 (2005-05-01), Matsumoto et al.
patent: 2007/0050538 (2007-03-01), Northcutt et al.
patent: 2008/0183921 (2008-07-01), Chang et al.
U.S. Appl. No. 11/479,413, Filed Jun. 30, 2006, entitled “Serial Advanced Technology Attachment Device Presence Detection And Hot-Plug In Low Power Mode,” by Eng Hun Ooi, et al.

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