Cache flushing

Details Cache flushing Cache flushing

2006-08-08

2006-08-08

Tran, Denise (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C712S043000, C710S260000

Reexamination Certificate

active

07089366

ABSTRACT:
Portions of a cache are flushed in stages. An exemplary flushing of the present invention comprises flushing a first portion, performing operations other than a flush, and then flushing a second portion of the cache. The first portion may be disabled after it is flushed. The cache may be functionally divided into portions prior to a flush, or the portions may be determined in part by an abort signal. The operations may access either the cache or the memory. The operations may involve direct memory access or interrupt servicing.

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patent: 5913225 (1999-06-01), Ohba et al.
patent: 6003116 (1999-12-01), Morita et al.
patent: 6442700 (2002-08-01), Cooper
patent: 6483516 (2002-11-01), Tischler
patent: 6496888 (2002-12-01), Pole, II
patent: 6591347 (2003-07-01), Tischler et al.

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