Cache flush operation for a stack-based microprocessor

Details Cache flush operation for a stack-based microprocessor Cache flush operation for a stack-based microprocessor

1998-02-27

2001-04-17

Yoo, Do Hyun (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S132000, C711S118000

Reexamination Certificate

active

06219757

ABSTRACT:

TECHNICAL FIELD
The present invention relates to cache memory used in a computer and more particularly to a method for deleting the contents of the data cache memory in the microprocessor.
BACKGROUND ART
FIG. 1
illustrates a typical hardware configuration for a computer
10
having a central processing unit (CPU)
12
, a data cache memory unit
14
, regular memory
18
and an input/output device
22
. The CPU
12
includes a stack cache memory unit
23
. The data cache memory
14
and the stack cache
23
are typically static random access memory (SRAM), whereas the regular memory
18
is dynamic random access memory (DRAM). The input/output device
22
can be any type of peripheral attached to a computer which generates or uses data, such as a data storage device or a network interface. The CPU
12
, stack cache
23
and data cache
14
are generally part of a microprocessor
24
. Generally, the CPU
12
includes a stack pointer
26
.
Data, computer programs (applications) and/or parts of programs running on the computer
10
are stored in the regular memory
18
and in the data cache memory
14
. Typically, information travels between the data cache memory
14
and the CPU
12
much faster than it travels between the regular memory
18
and the microprocessor
24
. For example, information may travel between the data cache memory
14
and the CPU
12
in ten nanoseconds, whereas the same transaction between the regular memory
18
and the microprocessor
24
would take one hundred nanoseconds. Therefore, frequently used information is stored in the data cache memory
14
so that it can be accessed faster by the CPU
12
.
Periodically, information stored in the data cache
14
has to be deleted. The process of deleting information from the data cache
14
is referred to as a cache flush operation. For example, a cache flush is necessary when it is desired to ensure that the same information is contained in the data cache memory
14
as in the regular memory
18
. If the microprocessor
24
is a RISC based microprocessor, the cache flush operation can specify the address of each cache line and cause information at each cache line address to be deleted. However, with stack based microprocessors (e.g. a JAVA™ microprocessor), cost sensitivity makes it undesirable to specify the address of each cache line. Moreover, with stack based microprocessors, the bytecodes for the cache flush operation have to be small (about two bytes). Therefore, a simplified cache flush procedure is needed for use with stack based microprocessors.
SUMMARY OF THE PRESENT INVENTION
Briefly, the present invention comprises a method for flushing the data cache in a microprocessor. A central processing unit in the microprocessor performs an operation (e.g. addition or subtraction) on a first address stored in a stack cache. The first address is associated with a first cache line in the data cache memory.
After the operation, the result of the operation is left on the top of the stack in the stack cache as a second address. During the same clock cycle of the microprocessor in which the operation is performed, a valid bit associated with the first cache line is changed from a valid setting to an invalid setting. The entire data cache is flushed by repeating this process for each cache line.


REFERENCES:
patent: 5043870 (1991-08-01), Ditzel et al.
patent: 5913225 (1999-06-01), Ohba et al.
patent: 5953741 (1999-09-01), Evoy et al.
Jim Handy “The Cache Memory Book”, p. 128, Dec. 1993.

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