Cache entry selection method and apparatus

Details Cache entry selection method and apparatus Cache entry selection method and apparatus

2006-12-05

2006-12-05

Peikari, B. James (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Access timing

C711S118000, C711S001000, C711S151000, C711S158000, C710S029000, C710S040000, C710S058000

Reexamination Certificate

active

07146478

ABSTRACT:
A method for selectively inserting cache entries into a cache memory is proposed in which incoming data packets are directed to output links according to address information. The method comprises the following steps: a) an evaluation step for evaluating for each incoming data packet classification information which is relevant to the type of traffic flow or to the traffic priority to which the data packet is associated; b) a selection step for selecting based on the result of the evaluation step whether for the data packet the cache entry is to be inserted into the cache memory; c) an entry step for inserting as the cache entry into the cache memory, in the case the result of the selection step is that the cache entry is to be inserted, for the data packet the address information and associated output link information.

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