Cache directory configuration method and information...

Details Cache directory configuration method and information... Cache directory configuration method and information...

2005-01-25

2005-01-25

Padmanabhan, Mano (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S129000, C711S173000, C711S141000

Reexamination Certificate

active

06848023

ABSTRACT:
The present invention relates to a cache directory configuration method and an information processing device that implements the same. In an embodiment of this invention, each cache directory is divided up into a plurality of units that can be operated in a parallel manner. A plurality of search requests can be processed by each cache directory concurrently. Thus this embodiment allows the hardware requirements for the cache directory to be restricted while providing cache directory search performance higher than that of the conventional technology.

REFERENCES:
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patent: 6073212 (2000-06-01), Hayes et al.
patent: 6311253 (2001-10-01), Chang et al.
patent: 6480927 (2002-11-01), Bauman
patent: 2000-172564 (2000-06-01), None
Handy, “The Cahce Memory Handbook”, 2ndedition Academic Press 1998, pp. 14-22 and 50-63.

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