Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1998-05-08
2000-10-03
Thai, Tuan V.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711 3, 711118, 711154, 711149, G06F 1200
Patent
active
061287040
ABSTRACT:
The present invention provides a cache DataRam with one port ram cell configuration which improves the implemented area efficiency, performance and power savings. The cache DataRam of superscalar processor having multiple pipelines includes: a plurality of banks for multiple data access requests from the multiple pipelines, the plurality of banks forming into one port ram cell structure; a bank selection signal generation circuitry for generating a bank selection signal representing on which bank a data requested by the pipeline is located in response to address signals and control signals inputted from each pipeline for data access; a address selector for selecting an index address out of plurality of index addresses from the pipelines and outputting the selected index address as a valid pipeline index address in response to the bank selection signal; a decoder for decoding the valid pipeline index address for each bank; and a hitway selector for selecting a hitway signal out of hitway signals of the pipelines and outputting the selected hitway signal as a valid pipeline hitway signal, the hitway signals being generated by tag block for the each bank in response to the bank selection signal.
REFERENCES:
patent: 5025421 (1991-06-01), Cho
patent: 5117493 (1992-05-01), Jensen
patent: 5253352 (1993-10-01), Olson
patent: 5341487 (1994-08-01), Derwin et al.
patent: 5353424 (1994-10-01), Partovi et al.
patent: 5509137 (1996-04-01), Itomitsu et al.
patent: 5513335 (1996-04-01), McClure
patent: 5553270 (1996-09-01), Rosenbluth
patent: 5557768 (1996-09-01), Braceras et al.
patent: 5561782 (1996-10-01), O'Connor
patent: 5590309 (1996-12-01), Checinski et al.
patent: 5692151 (1997-11-01), Cheong et al.
patent: 5790822 (1998-08-01), Sheaffer et al.
Hyundai Electronics Industries Co,. Ltd.
Thai Tuan V.
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