Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2000-04-19
2004-04-20
Sparks, Donald (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S118000, C711S202000
Reexamination Certificate
active
06725329
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to disk drive performance features and more particularly to a disk drive having a cache control system for improving the disk drive's response time to host commands.
2. Description of the Prior Art
A host computer stores and accesses data on a disk drive by issuing commands to the disk drive over a standardized interface. The smallest indivisible data unit addressable on a disk is a logical block or disk sector, typically of 512 bytes, and each such disk sector is assigned a logical block address (LBA). When the host computer sends a command to the disk drive, the nature of the command is specified, e.g., read or write, along with a start LBA and a count specifying the number of contiguous sectors to be transferred.
Existing disk drives typically have a semiconductor cache memory for temporarily storing disk data that is likely to be requested by a host computer. The response time latency for storing and accessing data in a semiconductor memory is much smaller than the response time latency for mechanically storing and accessing data stored on a rotating disk. Also, the disk drive typically has a microprocessor for managing the disk drive's operation. In existing disk drives, the microprocessor may be interrupted to respond a to host command. If an LBA range specified by the host command is not located in an existing cache memory segment, then the microprocessor must further allocate and configure a cache memory segment for responding to the host command. The disk drive's response to the host command and other microprocessor-managed disk operation may be delayed while the segment is allocated.
Accordingly, there exists a need for a disk drive having a disk cache system for efficiently allocating and configuring memory segments for responding to host commands. The present invention satisfies these needs.
SUMMARY OF THE INVENTION
The invention may be embodied in a disk drive, and related method, for servicing host disk commands using a cache memory having a plurality of sequentially-ordered memory clusters for caching disk data of disk sectors identified by logical block addresses. The disk drive includes a cache control system having a tag memory usable only for providing a plurality of tag records. Each tag record is associated with a range of logical block addresses and is configured to define a variable length segment of the memory clusters for caching disk data of the range of logical block addresses without regard to the sequential order of the memory clusters. The cache control system also has means for allocating a tag record for servicing a host disk command.
In more detailed features of the invention, each tag record may include a state entry indicating whether the tag record is free or available for servicing a current host disk command. The disk drive may also include means for determining a least recently used tag record and a microprocessor that de-allocates, if a tag record is not free or available for servicing a current host command, a least recently used tag record having a state entry indicating that the tag record may be reused for allocating to service a host command. The drive may include means for allocating the de-allocated tag entry record for servicing the current host disk command.
In other more detailed features of the invention, the cache control system further includes means for determining a tag entry record used for servicing a most recent host disk command. Also, the plurality of tag records may be accessed by a microprocessor and a host writable control store and the disk drive may further include means for arbitrating access to the plurality of tags records between the microprocessor and the host writable control store.
REFERENCES:
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patent: 5717888 (1998-02-01), Candelaria et al.
patent: 5765204 (1998-06-01), Bakke et al.
patent: 5875352 (1999-02-01), Gentry et al.
patent: 5875454 (1999-02-01), Craft et al.
patent: 6018789 (2000-01-01), Sokolov et al.
patent: 6092150 (2000-07-01), Sokolov et al.
Castro Ralph H.
Ng Tsun Y.
Wilkins Virgil V.
Fawcett, Esq. Robroy R.
Peugh Brian R.
Shara, Esq. Milad G.
Sparks Donald
Western Digital Technologies Inc.
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