Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-01-11
2005-01-11
Kim, Matthew (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S144000
Reexamination Certificate
active
06842824
ABSTRACT:
A cache control program that maintains a high cache hit ratio even in the case of a file of large size being accessed. A computer that executes the cache control program judges whether transferred data specified by a data read request and data following the transferred data are stored in a cache area including a plurality of blocks (step S1). The plurality of blocks are ranked according to order of reuse. The computer preferentially selects a block of high rank in order of reuse as a block for storing nonstored data that is not stored in the cache area (step S2). The computer transfers in order the nonstored data in a storage device to the storage block (step S3) and reads the transferred data into a predetermined storage area (step S4). The computer judges whether there is continuity between the transferred data and data transferred just before the transferred data. If they are a continuous series of pieces of data, the rank in order of reuse of a block which stores a predetermined number of pieces of data from the head of the series of pieces of data is lowered (step S5).
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Hosokawa Isao
Kawase Yoshitake
Yamauchi Katsutoshi
Fujitsu Limited
Greer Burns & Crain Ltd.
Kim Matthew
Thomas Shane
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