Cache coherent switch device

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture

Reexamination Certificate

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Details

C711S141000

Reexamination Certificate

active

07921253

ABSTRACT:
In one embodiment, the present invention includes a switch device to be coupled between a first semiconductor component and a processor node by interconnects of a communication protocol that provides for cache coherent transactions and non-cache coherent transactions. The switch device includes logic to handle cache coherent transactions from the first semiconductor component to the processor node, while the first semiconductor component does not include such logic. Other embodiments are described and claimed.

REFERENCES:
patent: 6009488 (1999-12-01), Kavipurapu
patent: 6529968 (2003-03-01), Anderson
patent: 7480770 (2009-01-01), Zeffer et al.
patent: 2009/0006668 (2009-01-01), Vasudevan et al.

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