Cache coherence protocol for a multiple bus multiprocessor...

Details Cache coherence protocol for a multiple bus multiprocessor... Cache coherence protocol for a multiple bus multiprocessor...

2008-05-13

2008-05-13

Elmore, Stephen C. (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S141000, C711S144000, C711S145000

Reexamination Certificate

active

07373457

ABSTRACT:
A computer system maintains a list of tags (called a Global Ownership Tag List (GOTL)) for all the cache lines in the system that are owned by a cache. The GOTL is used for cache coherence. There may be one central GOTL. Alternatively, the GOTL may be distributed, so that every device that can request a copy of memory data maintains a local copy of the GOTL. The GOTL can be limited to a relatively small size. For a limited size list, a tag may need to be evicted to make room for a new tag. A line associated with an evicted tag must be written back to memory.

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