Byte organized static memory

Details Byte organized static memory Byte organized static memory

1984-02-17

1986-07-08

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Bad bit

365189, 365230, G11C 1140

Patent

active

045997098

ABSTRACT:
A static random access memory arrangement provides for accessing a desired number of bits (i.e., a byte) simultaneously by placing the accessed columns adjacent one another. For example, if the memory provides 8 bits when accessed, then a group of 8 adjacent columns is addressed, whereas the prior art provided for accessing one column out of each of 8 separate groups. The present scheme provides for improved utilization of spare columns for redundancy purposes, and also allows for partial row selection for reduced power consumption and noise.

REFERENCES:
patent: 4228528 (1980-10-01), Cenker et al.
patent: 4241425 (1980-12-01), Cenker et al.
patent: 4441170 (1984-04-01), Focmsbee et al.
patent: 4456980 (1984-06-01), Yamada et al.
patent: 4462091 (1984-07-01), Knepper et al.
"A 64kb Full CMOS RAM with Divided Word Line Structure", 1983 Digest of Technical Papers, IEEE Int. Solid-State Cir. Conf., Masahiko Yoshimoto et al., Feb. 23-25, 1983, pp. 58-59.
"A HI-CMOSII 8Kx8b Static RAM", 1982 Digest of Technical Papers, IEEE Int. Solid-State Cir. Conf., Osamu Minato et al., Feb. 12, 1982, pp. 256-257, 332.

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