Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate
2005-02-01
2005-02-01
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Chip mounted on chip
C257S678000, C257S734000
Reexamination Certificate
active
06849951
ABSTRACT:
A die having a bypass capacitor is stacked on another die having an active circuit. The active circuit draws a spike of current, for example, during a switching period of a voltage on its output lead from one digital logic level to another digital logic level. The bypass capacitor provides a portion of the spike of current through a conductive plug that extends from a plate of the bypass capacitor to a power lead of the active circuit. The length of the conductive plug is reduced by extending the conductive plug from the bypass capacitor to the active circuit orthogonally to the planar orientation of the dice. Reducing the length of the conductive plug reduces the resistance and inductance of the conductive plug and, in turn, reduces the drop in voltage between the voltage on the bypass capacitor and the voltage on the power lead of the active circuit.
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Kaustav Banerjee, Shukri J. Souri, Pawan Kapur and Krishna C. Saraswat, “3-D ICs: A Novel Chip Design for Improving Deep-Submicrometer Interconnect Performance and Systems-on-Chip Integration,” IEEE, May 2001, pp. 602-633, vol. 89., No. 5, available from Center for Integrated Systems, Stanford University, Stanford, CA., 94305.
Lesea Austin H.
Trimberger Stephen M.
Andújar Leonardo
Cartier Lois D.
Flynn Nathan J.
Harms Jeanette S.
Wallace T. Lester
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