Bus transaction management within data processing systems

Details Bus transaction management within data processing systems Bus transaction management within data processing systems

2007-05-01

2007-05-01

Rinehart, Mark H. (Department: 2112)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus interface architecture

C711S154000

Reexamination Certificate

active

10862884

ABSTRACT:
A data processing system is provided with a bus having separate write channels W and read channels R via which bus transactions are made. Bus transaction buffers34are provided within the bus structure to buffer write requests, particularly so as to alleviate problems associated with relatively slow bus slaves. The bus transaction buffers34are responsive to the memory addresses associated with write requests and read requests which pass through them to identify those to the same memory address, or memory addresses within a predetermined range, so as to either ensure a strict correct ordering of those transactions, read to follow write, or to satisfy a read following a write with a buffered write data value and then flushing the read request such that it does not reach its final destination.

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