Bus terminator/monitor/bridge systems and methods

Details Bus terminator/monitor/bridge systems and methods Bus terminator/monitor/bridge systems and methods

2007-10-31

2010-02-09

Cleary, Thomas J (Department: 2111)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C710S306000

Reexamination Certificate

active

07661024

ABSTRACT:
Computing systems including first and second processors configured to control first and second buses, respectively, and a terminator-monitor-bridge (TMB) device coupled between the first and second buses are provided. The TMB device is configured to selectively enable the first processor and the second processor to control at least a portion of the second bus and the first bus, respectively. TMB devices and methods for operating the TMB devices in accordance with the above configuration are also provided.

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