Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
1998-06-11
2001-07-03
An, Meng-Al T. (Department: 2154)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
C710S120000, C710S107000
Reexamination Certificate
active
06256689
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to data communications systems and methods, and more particularly, to bus systems and methods.
2. Statement of the Problem
High-bandwidth busses are typically used to communicate between hosts and peripherals in applications such as computer networks. The bus interfaces used by hosts and peripherals often take different forms depending on the performance characteristics desired. For example, the Peripheral Component Interconnect (PCI) standard defines a high speed synchronous bus well suited for local bus communications between processors and peripherals using low-power CMOS devices over relatively short 32-bit and 64-bit wide data paths. Relatively streamlined in operation, PCI busses can reach transfer rates of up to 264 Mbytes per second on long burst transfers. In contrast, the Small Computer System Interface (SCSI) defined by ANSI X3.131 defines busses which may-operate over much longer lengths without a bus signal, an arrangement more suited for interfacing with peripheral devices such as disk drives. The PCI and SCSI bus standards are described in “
Understanding I/O Subsystems,
” published by Adaptec Press, 1st edition, 1996.
Bus specifications often limit, among other things, the length of the bus and the number of devices that may be attached to the bus in order to maintain performance. For example, PCI and SCSI standards define limits on conductor length and number of devices. In order to increase the capacity of a bus such as a PCI bus, an expanded multi-layer bus structure may be used that includes a plurality of busses connected by high-speed bus bridges. This multi-layer structure can allow an increased number of devices to be interconnected while maintaining bus performance.
Although computer systems and networks may be expanded by the addition of bus bridges, it may be problematic to provide for such expansion. For example, in a personal computer (PC) it is often desirable to provide space for mounting a plurality of local bus peripherals, e.g., PCI agents such as sound cards, video cards, local area network (LAN) cards and the like. Because the PCI standard limits a PCI bus to ten unit loads, a single PCI bus typically can only support three to four expansion slots. PCI-PCI bridges may be used to provide increased capacity, but the numbers of agents provided in particular units may vary widely. Accordingly, it may not be cost effective to provide PCI-PCI bus bridges for bus capacity that may not be utilized by all potential users.
SUMMARY OF THE INVENTION
In light of the foregoing, it is an object of the present invention to provide bus systems and method of operation therefor that can provide bus reconfiguration and expansion in a more flexible and cost-efficient manner.
According to the present invention, these and other objects, features and advantages are provided by bus systems and methods of operation therefore in which bus bridge detection circuit commands a bus switching circuit, e.g., a CMOS bus switch array, to allow signal flow between two busses when the busses are not connected by a bus bridge and to impede signal flow between the busses when the busses are connected by a bus bridge. The bus bridge detection circuit may comprise, for example, a logic circuit operative to detect a grounded pin of a bus bridge circuit assembly connected to a connector in which the two busses are provided.
The present invention provides a bus system in which a single bus composed of two sub-busses linked by a bus switch may be converted into a multiple bus system by simply inserting a bus bridge circuit card into a connector including both subbusses. Accordingly, users that do not require the increased bus capacity afforded by the bus bridge circuit may avoid the cost of the bus bridge circuit while still having use of both sub-busses. Because the reconfiguration of the bus system can be performed automatically upon insertion or removal of a bus bridge circuit card, a user can be relieved of the need to set switches, reprogram devices or the like. In addition, the likelihood of configuration errors can be reduced.
In particular, according to the present invention, an expandable bus system comprises a first bus and a second bus. A bus bridge detection circuit is operative to detect presence and absence of a common bridge circuit connected between the first bus and the second bus. A bus switching circuit is connected to the first bus and to the second bus, is responsive to the bus bridge circuit detection circuit and is operative to allow signal flow between the first bus and the second bus in response to detection of the absence of a common bus bridge circuit connecting the first bus and the second bus and to impede signal flow between the first bus and the second bus in response to detection of the presence of a common bus bridge circuit connecting the first bus and the second bus.
In an embodiment according to the present invention, the first bus and the second bus are provided in a connector configured to releasably connect to a bus bridge circuit, and the bus bridge detection circuit is operative to detect presence and absence of a bus bridge circuit at the connector. The first bus, the second bus, the bus switching circuit and the connector may be included in a first circuit assembly, with the connector being configured to connect to a bus bridge circuit included in a second circuit assembly.
According to method aspects of the present invention, a signal path is provided between a first bus and a second bus responsive to removal of a bus bridge connected between the first bus and the second bus, thereby allowing the first and second busses to operate as a common bus. Responsive to connection of a bus bridge circuit between the first bus and the second bus, signal flow is impeded between the first bus and the second bus, for example, by opening a bus switch connected to the first bus and the second bus. A flexible automatic technique for bus reconfiguration can thereby be provided.
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Adaptec, Inc.
An Meng-Al T.
Boggs LLP Patton
Chang Jung-won
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