Bus system design method, bus system, and device unit

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output process timing

Reexamination Certificate

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Details

C710S301000, C710S302000, C710S303000, C710S304000, C713S501000, C713S502000, C713S503000, C713S600000

Reexamination Certificate

active

10777707

ABSTRACT:
A design method for a bus system comprising a noise propagation computation step and a connection timing computation step. Based on the cycle of a timing signal, a signal propagation delay in a device unit, signal propagation delays in a timing-signal bus and a data bus, and a setup time in the device unit or device connected on the data bus, the noise propagation computation step computes timing at which, when the device unit is connected on the data bus being active, noise propagates to other device units other than the connected device unit or to the device connected on the data bus. Based on the timing computed in the noise propagation computation step, the connection timing computation step computes connection timing at which the device unit is connected on the data bus.

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