Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
2008-04-01
2008-04-01
Knoll, Clifford (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
C710S118000, C370S447000
Reexamination Certificate
active
11267153
ABSTRACT:
In a bus system, in accordance with reservations of transfers of isochronous blocks of data and with requests by the node devices for transfers of ones of the isochronous blocks of data and regular blocks of data, a bus manager generates a schedule of the operating rate of a bus channel, the frequency of assignment of the bus channel, and the size of a continuously transferred piece of data on the bus channel for each of the blocks of data, so that the piece of data is transferred at the operating rate of the bus channel as low as possible in each transfer cycle.
REFERENCES:
patent: 6889276 (2005-05-01), Brown
patent: 7131135 (2006-10-01), Virag et al.
patent: 2007/0038793 (2007-02-01), Wehage et al.
patent: 2000-020458 (2000-01-01), None
patent: 2003-030133 (2003-01-01), None
Kawai Jun
Yamada Hiroshi
Arent Fox LLP.
Fujitsu Limited
Knoll Clifford
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