Bus system and bus interface for connection to a bus

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture

Reexamination Certificate

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Details

C710S220000

Reexamination Certificate

active

07058747

ABSTRACT:
The invention relates to a bus system comprising a first station and a second station coupled by a bus for transferring data and control signals. The bus is conceived to operate according to a protocol in which the first station repeatedly sends requests to the second station. The first station comprises a processor, a bus interface, and a buffer coupled to said interruptible processor and said bus interface, the processor being operable to generate request properties for the requests to be sent by the first station. Furthermore, the processor is operable to handle said data items. The buffer is operable to store said request properties. The bus interface is operable to generate said requests from said stored request properties and to repeatedly send said requests.

REFERENCES:
patent: 4638428 (1987-01-01), Gemma et al.
patent: 5249269 (1993-09-01), Nakao et al.
patent: 5586056 (1996-12-01), Watanabe
patent: 5675807 (1997-10-01), Iswandhi et al.
patent: 6058440 (2000-05-01), Bloch et al.
patent: 6449663 (2002-09-01), Carney et al.
patent: 6640268 (2003-10-01), Kumar

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