Bus snoop control circuit

Electrical computers and digital data processing systems: input/ – Intrasystem connection

Reexamination Certificate

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Details

C710S107000, C711S146000

Reexamination Certificate

active

06507878

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a bus snoop control circuit, and more particularly, to a bus snoop control circuit which provides a computer system or the like with a snooping function.
Snooping in computer systems means the operation of monitoring a write access to a memory to ensure cache coherency in a multiprocessor system to which a cacheable, central processing unit (CPU) is mounted. In addition, in Peripheral Component Interconnect (PCI) buses, the computer system can be provided with a Video Graphics Array (VGA) palette snoop.
The VGA palette snoop is used in a system which has two graphic controller boards, where one graphic controller board is VGA-compatible, while the other is VGA-incompatible. The VGA-incompatible board monitors the write access to VGA palette registers of the VGA-compatible board and writes the write data to its own register without responding to the bus.
In the VGA palette snoop, the board determines whether or not it snoops the data based on information contained in a certain bit (VGA palette snoop bit) in the register which is provided inside the board. If the board determines that it snoops the data, the data which has been written to the specific address is snooped.
However, in the method of snooping the write data to the specific device, if it is necessary to change the board in which the snooping should be performed to the board in which the snooping should not be performed, there is a problem because it is necessary to rewrite the bit, which designates whether or not the present board is the board which the snooping function should be performed, before the data is written to the address for the snoop.
SUMMARY OF THE INVENTION
An object of the invention is to provide a bus snoop control circuit which changes the board in which the snooping should be performed and the board in which the snooping should not be performed.
According to one aspect of the present invention, a bus snoop control circuit connected, to a bus is provided which includes: a first circuit which determines whether or not the bus snoop control circuit snoops data based on an address obtained from the bus.
According to another aspect of the present invention, a bus system is provided which includes: a bus; a plurality of circuit boards; and a plurality of first circuits each of which is provided in each of the circuit boards and determines whether or not a corresponding one of the circuit boards snoops data based on an address obtained from the bus.
According to another aspect of the present invention, a method for controlling a snoop in a circuit board connected to a bus, is provided which includes: obtaining an address from the bus; and determining whether or not the board snoops data based on the address.


REFERENCES:
patent: 5072369 (1991-12-01), Theus et al.
patent: 5829040 (1998-10-01), Son
patent: 5974511 (1999-10-01), Boddu et al.
patent: 6151641 (2000-11-01), Herbert
patent: 6173368 (2001-01-01), Krueger et al.

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