Bus representation for efficient physical synthesis of...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

07451427

ABSTRACT:
A method for the abstraction of connectivity that provides an intermediate data path representation of integrated circuit (IC) designs is provided. The connectivity abstraction maintains the compactness of a bus level representation as well as the uniqueness of a bit level representation. Connectivity abstraction significantly reduces network complexity, i.e., the number of wires in a design and the execution time of physical synthesis of IC designs.

REFERENCES:
patent: 4122520 (1978-10-01), Adamchick et al.
patent: 5572437 (1996-11-01), Rostoker et al.
patent: 6009251 (1999-12-01), Ho et al.
patent: 6145117 (2000-11-01), Eng
patent: 6272665 (2001-08-01), Johnson et al.
patent: 6516456 (2003-02-01), Garnett et al.
patent: 6684376 (2004-01-01), Kerzman et al.

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