Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
2010-07-13
2011-10-18
Phan, Raymond (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
C710S309000, C710S316000
Reexamination Certificate
active
08041868
ABSTRACT:
A combination includes a first bus master coupled to a first bus to output a first signal group including at least one of signals onto the first bus, a second bus master coupled to the first bus to output a second signal group including at least one of signals onto the first bus, an interconnect section coupled between the first bus and a second bus to receive the first and second signal groups and to output a third signal group including at least one of signals onto the second bus, and a bridge section coupled between the second bus and a third bus to receive the third signal group and to output a fourth signal group including at least one of signals onto the third bus free from performing a selecting operation for the third signal group.
REFERENCES:
patent: 6425041 (2002-07-01), Klein
patent: 7380045 (2008-05-01), Park et al.
patent: 7581049 (2009-08-01), Tanabe
patent: 7783804 (2010-08-01), Kazama
patent: 2006/0080489 (2006-04-01), Hiji
patent: 2005-244979 (A) (2005-09-01), None
patent: 2006-065457 (A) (2006-03-01), None
patent: 2006-127022 (A) (2006-05-01), None
“AMBATM specification, Rev2. 1999. pp. 18-19”.
Japanese Office Action dated Jul. 12, 2011, with English translation.
McGinn Intellectual Property Law Group PLLC
Phan Raymond
Renesas Electronics Corporation
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