Electronic digital logic circuitry – Interface – Current driving
Reexamination Certificate
2003-04-07
2004-04-20
Cho, James H (Department: 2819)
Electronic digital logic circuitry
Interface
Current driving
C326S056000, C326S093000
Reexamination Certificate
active
06724224
ABSTRACT:
BACKGROUND OF INVENTION
This invention relates to integrated circuits (IC's ), and more particularly to voltage-converter and bus relays without a direction control input.
Continued shrinking of physical device sizes in integrated circuit (IC) chips has necessitated the reduction of power-supply voltages. Smaller voltages are needed to prevent punch-through or other breakdown and failure of the smaller, more delicate transistors.
Power-supply voltages have been gradually lowered over the last several years, from 5.0-volts to 3.3, 2.5, 1.8, 1.5, and 1.2 volts. The result is that some IC chips operate with 3.3-volt signals, while others operate with 1.8-volt or other signal voltages. A designer of an electronic system may need to use IC chips with different signal-voltage levels. The system-level designer must carefully design interfaces between the different voltage domains. For example, a 1.8-volt microprocessor may need to be interfaced with bus-logic chips that use 2.5-volt signals.
Bus-interface chips may be placed between the different voltage domains.
These bus-interface chips can convert signals from one voltage to another. For example, a logic high signal of 2.5 volts can be stepped down to 1.8 volt, while logic lows of zero volts are passed through. In the reverse direction, a 1.8-volt input can be converted to a 2.5-volt output.
Often a direction control signal must be inputted to the bus-interface chip.
FIG. 1
shows a bit slice of a bus-interface chip with a direction-control input. Bus-interface chip
10
converts signals between bus A and bus B.
An input signal such as direction (DIR) is generated by external bus-control logic. Input DIR is buffered by inverter
16
and enables forward buffer
14
and disables reverse buffer
12
when DIR is low, but enables reverse buffer
12
and disables forward buffer
14
when DIR is high. When DIR is high, external driver
26
drives a signal to bus B, which is buffered by reverse buffer
12
to drive bus A. Input buffer
22
reads this signal on bus A.
When DIR is low, external driver
20
drives a signal to bus A, which is buffered by forward buffer
14
to drive bus B. Input buffer
24
reads this signal on bus B.
Bus A and B may operate at the same high-level voltage, or may operate at different voltages. For example, the power-supply for bus A may be applied to reverse buffer
12
, while the power-supply voltage for bus B is applied to forward buffer
14
.
When the high-level bus voltages are the same, bus-interface chip
10
is considered to be a bus relay device. When the high-level voltages on the two busses are different, bus interface chip
10
is considered to be a voltage converter or voltage shifter.
While such a bus interface is useful, external generation of the direction control signal DIR may be difficult for some systems. Bus-handshake, timing, or strobe signals may need to be sampled from a microprocessor or other bus-master device to determine in what direction the signals are propagating and when.
Some systems and bus protocols may not have clear-cut signals that can be used to generate the direction signal. Some bus protocols may not have the direction signal while there is a need for connecting devices working at different voltages. There is also a need to use a buffer to extend the wiring trace for longer distance, or to use a buffer for higher speeds and for connecting more devices, while the direction signal is not available in some protocols. Communication relays may receive only data without timing or control signals. Timing may be unspecified when delays are large. Bus conflicts or contention may occur when two buffers drive the same bus line, such as can occur if the direction control input is in the wrong state, even for a short period of time. Damage may result to the devices.
What is desired is a bus-interface chip that does not have a direction-control input. A bi-directional bus-interface chip is desired that automatically determines direction without examining an externally-generated direction-control input. A voltage shifter without a direction-control input is desirable.
REFERENCES:
patent: 5084637 (1992-01-01), Gregor
patent: 5107257 (1992-04-01), Fukuda
patent: 5194764 (1993-03-01), Yano et al.
patent: 5214330 (1993-05-01), Okazaki
patent: 5300835 (1994-04-01), Assar et al.
patent: 5424659 (1995-06-01), Stephens et al.
patent: 5485458 (1996-01-01), Oprescu et al.
patent: 5521531 (1996-05-01), Okuzumi
patent: 5672983 (1997-09-01), Yamamoto et al.
patent: 5680064 (1997-10-01), Masaki et al.
patent: 5808492 (1998-09-01), Chow
patent: 5999389 (1999-12-01), Luebke et al.
patent: 6072342 (2000-06-01), Haider et al.
patent: 6127849 (2000-10-01), Walker
patent: 6163170 (2000-12-01), Takinomi
patent: 06052093 (1994-02-01), None
MAX3370 Data Sheet, Maxim Corp., 2/01, pp. 1-10.
Auvinen Stuart T.
Cho James H
Pericom Semiconductor Corp.
LandOfFree
Bus relay and voltage shifter without direction control input does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Bus relay and voltage shifter without direction control input, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Bus relay and voltage shifter without direction control input will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3242926