Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2000-11-22
2004-06-29
Vo, Tim (Department: 2189)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S317000, C714S001000, C714S011000
Reexamination Certificate
active
06757777
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a bus master switching unit and to a method for operating redundant bus masters.
BACKGROUND OF THE INVENTION
A number of bus subscribers are normally connected to a bus system, with the data transmission taking place via a bus system in accordance with a defined protocol. A requirement of special data transmission protocols is that at least one of the bus subscribers acts as a so-called bus master, with the bus master actively controlling the transmission protocol.
If the bus master in such a bus system fails, then this normally results in at least one adverse effect on the operation of the other bus subscribers, even if this does not result in failure of all the bus subscribers to operate, since no data transmission via the bus is possible without the bus master.
One possible bus system is, for example, Profibus, while programmable logic controllers can be used as bus masters, for example as central units. The bus can be used to connect the central unit to peripheral units for communication purposes, in particular also to decentralized peripheral units provided directly in the controlled and/or monitored process, with, firstly, the states of the technical process being recorded by the peripheral units and being transmitted cyclically to the central units and, secondly, control instructions being transmitted cyclically to the peripheral units.
SUMMARY
An object of the present invention is firstly to provide a switching unit by means of which one bus master from a group of redundant bus masters can in each case be connected to a non-redundant bus system. Another object of the present invention is to provide a method for operating redundant bus masters on a non-redundant bus system.
This object is achieved by providing an apparatus having a bus master switching unit for connecting one bus master from a group of at least two redundant bus masters to a non-redundant bus system. The bus master switching unit includes at least connections for connecting in each case one bus master and at least one connection to the connection of the non-redundant bus system. The bus master switching unit, includes at least one bus changeover switch and means, i.e., an actuator connected to the bus, for actuating the bus changeover switch, in which case the actuator can be actuated exclusively by the bus master or bus masters, and in which case, depending on the switch position, the bus changeover switch results in one bus master which is connected to the bus master switching unit in each case being connected to the bus.
This object is also achieved by providing a method for operating redundant bus masters on a non-redundant bus system. A bus master switching unit is provided for connecting one bus master from a group of at least two redundant bus masters to the bus system. The bus master switching unit includes at least connections for connecting in each case one bus master and at least one connection to the connection of the non-redundant bus system. The bus master switching unit further includes at least one bus changeover switch and an actuator connected to the bus for actuating the bus changeover switch. The actuator can be actuated exclusively by the bus master or bus masters and wherein, depending on the switch position, the bus changeover switch results in in each case one bus master which is connected to the bus master switching unit being connected to the bus.
The bus master switching unit can be implemented using simple circuitry if the actuator has or have outputs which, when appropriately actuated by the bus master or bus masters, assume(s) a logic state, which is or can be predetermined, for actuation of the bus changeover switch, and thus result in the bus changeover switch being in a defined switch position.
The circuitry implementation of the bus master switching unit is further simplified if the actuator is in the form of application-specific integrated circuits—ASIC—having a number of inputs and outputs, wherein the inputs and outputs can respectively be read to and read from by the respective connected bus master.
When a data transfer produced by the bus master takes place on the bus, a periodic signal change at at least one output from the respective application-specific integrated circuit can be produced and this signal change can be identified for the other bus master via at least one input of the respective application-specific integrated circuit, this makes it possible for the redundant, currently passive bus master to monitor the currently active bus master particularly efficiently. The periodic signal change thus represents an “indication that the active bus master is alive”. If no signal change takes place during a time interval which is or can be predetermined, then the passive bus master evaluates this to mean that the active bus master has failed. The passive bus master can then disconnect the failed bus master from the bus, and “install” itself as the bus master on the bus.
If either a data transfer between a first bus master connected to the bus master switching unit and a second bus master connected to the bus master switching unit takes place via the inputs and outputs of the application-specific integrated circuits, or the bus comprises at least one data line and the data line leads to each bus master which can be connected to the bus master switching unit, bypassing the bus changeover switch, it is also possible to transmit to the passive bus master the data being transmitted on the bus. This is done either by the active bus master transmitting the data to the passive bus master via a communication path provided between the application-specific integrated circuits, or by the passive bus master monitoring the bus traffic all the time by means of a direct connection at least to the data line.
REFERENCES:
patent: 4442502 (1984-04-01), Friend et al.
patent: 4484270 (1984-11-01), Quernemoen et al.
patent: 5313386 (1994-05-01), Cook et al.
patent: 2 146 810 (1985-04-01), None
M. Volz, “Profibus-DP-der Schnelle Bruder. Standardistierte Kommunikation fur die Dezentrale Peripherie”, Elektronik, vol. 42, No. 26, Dec. 28, 1993, pp. 50-53, 58-60*.
Griessbach Gunter
Ramm Enrico
Weissbach Bernhard
Kenyon & Kenyon
Vo Tim
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