Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
1999-12-30
2002-12-24
Gaffin, Jeffrey (Department: 2182)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
C710S005000, C710S007000, C710S020000, C710S022000, C710S033000, C710S039000, C710S052000, C710S104000, C710S107000, C710S112000, C710S120000
Reexamination Certificate
active
06499077
ABSTRACT:
FIELD OF THE INVENTION
The invention relates generally to information transfer over a computer bus. More specifically, the invention relates to a bus interface unit (BIU) connected with a requestor, wherein state information determining how the requestor will act on a particular transfer request is passed to the BIU which reflects the state information back to the requestor once access to the host bus is granted.
BACKGROUND OF THE INVENTION
A bus is a path over which data and commands are transmitted between components of a computer system. Each bus is characterized by the width of the data transfer path, the speed at which data may move along the path, and the protocol by which the data is transferred over the bus. There are a number of different types of busses within a typical computer system. For instance, a typical personal computer system has a processor bus which transfers information to and from the processor and the chipset, a cache bus which transfers data between a cache and the processor, a memory bus which transfers that transfers information between the chipset and the memory, a host (or local) bus (such as PCI) which is used to connect high speed peripherals to the chipset, and one or more I/O busses (such as an ISA bus, a SCSI bus, a IEEE 1394 bus or USB) connected to the host bus and used to connect certain types of peripherals to the computer system.
Each bus typically comprises one or more information transfer paths. For example, one path may be provided to transfer data and another may be provided to pass control information, such as address information about where in memory data is to be read from or written to. Additionally, each type of bus typically has a bus controller that controls the transfer of data and information over the bus between the components connected to it.
Where two different buses interface, an interface device, such as a bridge, is required to translate between the different protocols utilized by each bus to move information and data to facilitate the efficient transfer of information through the interface device.
For example, a typical personal computer has a PCI local bus to which certain performance critical devices are attached, such as video cards and storage devices. Additionally, a personal computer system typically has a ISA and/or USB bus connected to the PCI bus that is used for slower, less performance critical devices, such as mice, keyboards, and modems. In order to send data received from an Internet connection by a modem to a video card and subsequently a monitor for display, it is necessary to transfer the data over an interface device between the ISA and PCI buses. The interface device needs to be configured specific to the requirements of the PCI bus and be able to communicate with the PCI bus, while the interface device also needs to be configured to receive data and information from the ISA bus. Essentially, the interface device is designed specifically for the two buses it bridges.
A “request interface device” is one type of interface device in which commands or data may be transferred over a host bus such as a PCI bus to and from a peripheral to another component of the computer system without the involvement of the computer system's central processing unit (CPU). A typical request interface device is comprised of a bus interface unit (BIU) that communicates with a host bus for access to the host bus to transfer data and commands, and a requestor that generates requests for data and commands on behalf of a device or peripheral attached to another bus such as an I/O bus. An example of a requestor would be a DMA engine that can read and write to memory without the involvement of the CPU.
For example, an interface device might include a DMA engine in communication with a printer connected to Universal serial bus (USB) that has been commanded by the CPU to print some pages of a document. The DMA engine might be directed to retrieve data stored in memory that represents the document being printed. Therefore, the DMA engine generates a request for the specific data and sends that request to the memory to retrieve the required data, however, in order transmit the request the DMA must get access to the PCI bus with which the memory is connected, typically, by way of a memory bus and a chipset. The BIU performs the function of gaining access to the PCI bus by communicating with the PCI bus controller and when permitted to do so mastering the PCI bus. The BIU then transmits the DMA's request to the memory, whereby the requested data is retrieved from the memory and transported to the DMA and eventually the printer.
SUMMARY OF THE INVENTION
A bus interface unit (BIU) and a method for operating the BIU are described wherein the BIU operates on transfer requests generated by a requestor for transmittal over a host bus of a computer system. The BIU has one interface with a requester through which it receives a request to transfer information over the host bus from the requestor along with state information associated with the request. The BIU also has another interface with the host bus, memory for storing both the transfer request and its associated state information, and BIU logic.
The BIU logic gains access to the host bus to facilitate the transfer of the transfer request over the host bus. Next, it retrieves the transfer request and the associated state information from memory. The transfer request is transmitted over the host bus to a target while the state information is contemporaneously reflected back through the interface in which the BIU is connected with the requester.
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Abramson Darren L.
Hunsaker Mikal C.
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Nguyen Tanh Q.
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