Bus interface circuit in a semiconductor memory device

Details Bus interface circuit in a semiconductor memory device Bus interface circuit in a semiconductor memory device

1998-06-18

2000-06-20

Etienne, Ario

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus access regulation

710126, 710128, 710100, 326 30, G06F 1300

Patent

active

060789786

ABSTRACT:
This invention relates to a bus interface circuit in a semiconductor memory device. This invention comprises a data driver to transmit a data signal through a first transmission line of which one end is terminated; a reference voltage driver to transmit a reference voltage signal through a second transmission line of which one end is terminated; and a receiver to determine a logic state by comparing the data signal transmitted by the first transmission line with the reference voltage signal transmitted by the second transmission line. Accordingly, a high-speed bus interface circuit of the present invention can decrease a common mode noise, influence of ground bounce, an output voltage swing and a power consumption by simultaneously driving a data driver and a reference voltage driver in a memory interface using a transmission line being either single or parallel terminated to transmit to a receiver.

REFERENCES:
patent: 5634014 (1997-05-01), Gist et al.
patent: 5687330 (1997-11-01), Gist et al.

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