Bus-hold circuit having low leakage when power is off

Details Bus-hold circuit having low leakage when power is off Bus-hold circuit having low leakage when power is off

1998-08-28

2000-08-01

Zweizig, Jeffrey

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Particular stable state circuit

326 86, H03K 312

Patent

active

060972297

ABSTRACT:
A bus-hold circuit includes an inverter (10) having an input (4) and an output (16). A first transistor (22) has a gate coupled to the output (16). A second transistor (20) has a source-drain current pat coupled in series with the current path of the first transistor (22) between a power supply terminal and a reference terminal. A third transistor (28) has a source-drain current path coupled between the gates of the first and second transistors (22, 20) and a gate coupled to the power supply terminal. A fourth transistor (30) has a source-drain current coupled between the gate of the second transistor (20) and the input and a gate coupled to the power supply terminal. A resistor (26) has a first terminal coupled to the source-drain current pats of the first and second transistors (22, 20) and a second terminal coupled to the input. The bush old circuit eliminates the need for a Schottky diode and allows near rail-to-rail bus operation.

REFERENCES:
patent: 5812002 (1998-09-01), Yoshida
patent: 5903180 (1999-05-01), Hsia et al.
patent: 5973530 (1999-10-01), Morris et al.

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