Bus hold circuit

Details Bus hold circuit Bus hold circuit

1996-08-29

1998-04-14

Hudspeth, David R.

Electronic digital logic circuitry

Interface

Current driving

326 30, 326 83, H03K 190175

Patent

active

057397023

ABSTRACT:
The bus hold circuit comprises: an input stage inverter (IN1) connected between a first supply voltage (Vcc) terminal and a second supply voltage (Vss) terminal and including: a first P-channel transistor (P1); and a first N-channel transistor (N1) connected in series to the first P-channel transistor, a gate of the first P-channel transistor and a gate of the first N-channel transistor being connected in common to a bus line (INA); and an output stage inverter (IN2) also connected between the first supply voltage (Vcc) terminal and the second supply voltage (Vss) terminal and including: a second P-channel transistor (P4); a third P-channel transistor (P2) connected in series to the second P-channel transistor; and a second N-channel transistor (N2) connected in series to the third P-channel transistor, a gate of the second P-channel transistor (P4) being connected to the bus line (Lout), a gate of the third P-channel transistor (P2) and a gate of the second N-channel transistor (N2) being connected in common to a drain of the first P-channel transistor (P1) and a drain of the first N-channel transistor (N1), a drain of the third P-channel transistor (P2) and a drain of the second N-channel transistor (N2) being connected in common to the bus line (Lout). In particular, back gates (i.e., the N-type well) of the first second and third P-channel transistors (P1, P4 and P2) are all connected to a source of the P-channel transistor (P2), respectively. Therefore, it is possible to prevent unnecessary current from flowing to the supply voltage terminal of the bus hold circuit, even if an output circuit supplied with a supply voltage different from that of the bus hold circuit is connected to the bus line.

REFERENCES:
patent: 5227677 (1993-07-01), Furman
patent: 5329190 (1994-07-01), Igarashi et al.
patent: 5347177 (1994-09-01), Lipp
patent: 5498976 (1996-03-01), Hwang
patent: 5532630 (1996-07-01), Waggoner et al.
patent: 5592509 (1997-01-01), McClear et al.
patent: 5661417 (1997-08-01), Kondoh
Computer Design, (Japanese magazine) Feb. 1994, pp. 92-93.

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