Bus driver for high-speed data transmission with waveform adjust

Details Bus driver for high-speed data transmission with waveform adjust Bus driver for high-speed data transmission with waveform adjust

1995-10-18

1996-11-19

Westin, Edward P.

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Output switching noise reduction

326 82, 327335, 327381, H03K 190175

Patent

active

055766340

ABSTRACT:
A bus driver includes differentiating and delay circuits connected together in parallel. The differentiating circuit receives an input signal via a first buffer circuit and produces a first signal having a falling and rising period. The delay circuit delays the input signal to produce a second signal output via a second buffer circuit. The second signal is delayed so that the second signal begins falling after the first signal starts falling and so that second signal begins rising after the first signal starts rising. The first and second signals are combined to produce an output signal. The preceding edge of the output signal is rounded because the relatively short falling of the first signal precedes the relatively long falling of the second signal. The following edge of the output signal is rounded because the short rising of the first signal suppresses an end portion of the long falling of the second signal. The waveform of the output signal is adjustable by changing parameters such as, for example, the delay time of the delay circuit, the capacitance of the capacitor and the power of the first and second buffer circuits.

REFERENCES:
patent: 4532439 (1985-07-01), Koike
patent: 4779013 (1988-10-01), Tanaka
patent: 5204558 (1993-04-01), Kumaki et al.
patent: 5483188 (1996-01-01), Frodsham
patent: 5493232 (1996-02-01), Kube

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