Electronic digital logic circuitry – Interface – Current driving
Reexamination Certificate
1999-02-01
2001-10-30
Wamsley, Patrick (Department: 2819)
Electronic digital logic circuitry
Interface
Current driving
C326S086000, C326S087000
Reexamination Certificate
active
06310494
ABSTRACT:
BACKGROUND OF THE INVENTION
FIELD OF THE INVENTION
The invention relates to a bus driver for driving a signal on a bus line which is capacitively coupled to at least one further bus line having further signals.
Capacitive coupling of neighboring bus lines frequently occurs during the operation of a bus. The capacitive coupling is undesirable and, in the worst case, can lead to interference with, and thus to alteration of, the signals driven on the bus lines. The worst case of capacitive coupling occurs when a signal on a neighboring bus line has an opposite timing edge to the signal to be driven. Owing to the undesirable capacitive coupling that may be expected, the signal to be driven must be amplified and thus adapted to the worst case of capacitive coupling. However, the amplification leads to unnecessarily fast timing edges of the signal to be driven. The fast timing edges are likewise undesirable, however, since they cause electromagnetic radiation, whereby neighboring components can be influenced in an interfering manner. In order to reduce the electromagnetic radiation and, consequently, in order to improve the electromagnetic compatibility (EMC), it is necessary, therefore to take measures for adaptation to the respective capacitive coupling of the bus lines.
To date, bus drivers of the generic type have typically been adapted to the worst case in the event of capacitive coupling with neighboring bus lines, that is to say to the case described above, when opposite timing edges occur on neighboring bus lines. However, this very rigid dimensioning, adapted to the worst case of capacitive coupling, is frequently not satisfactory either, since excessively great compensation takes place in the region outside the extreme case described above and excessively steep, fast timing edges are consequently produced. As a result, the electromagnetic radiation is maximized.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a bus driver which overcomes the above-mentioned disadvantages of the prior art devices of this general type, whose driver intensity is dynamically adjustable.
With the foregoing and other objects in view there is provided, in accordance with the invention, in combination with a bus line capacitively coupled to at least one further bus line having further signals, a bus driver for driving a signal on the bus line, including: a compensation device that in an event of a change in the signal relative to at least one of the further signals, compensating for a deviation of the signal caused by the change.
According to the invention, the object is achieved by a bus driver of the generic type having a compensation device. The compensation device, in the event of a change in the signal relative to at least one of the further signals, compensates for the deviation of the signal caused by the change.
As a result of capacitive coupling, an interference signal may be superposed on a signal to be driven on the bus line of a bus. The interference signal may be caused for example by a further signal on at least one neighboring line. The neighboring line typically constitutes the two neighboring bus lines of the bus, but may also be formed by other neighboring signal lines that are capacitively coupled to the bus line. All that is essential in the case is that a relative signal change occurs between the signal to be driven and a signal on at least one of the neighboring lines. The compensation device according to the invention compensates for the interference signals by circuitry. In this way, the signal to be driven is not altered by interference signals that are coupled in.
Consequently, the present invention enables the bus driver intensity to be adapted dynamically to the signals of the neighboring capacitively coupled bus lines.
According to the invention, a number of secondary inverters can in this case be connected in parallel with the main inverter that drives the signal on the bus line. The number of secondary inverters typically corresponds to the number of neighboring bus lines capacitively coupled to the bus line.
In the case of an interference signal that is coupled in, at least one of the secondary inverters is connected in parallel with the main inverter for the purpose of compensating for the interference signals. The number of secondary inverters connected in results from the number of capacitively coupled neighboring bus lines. The secondary inverters generate a compensation signal that is superposed on the signal to be driven and thus compensates for the interference signal.
The invention is particularly advantageous if the signal to be driven on the bus line is clocked. Typically, the signals on the neighboring bus lines are then likewise clocked. The worst case arises when opposite timing edges of the driven clocked signals occur simultaneously on the bus line and on at least one of the neighboring bus lines. In the event of an opposite timing edge on one of the neighboring bus lines, one of the secondary inverters is connected in for the instant of the timing edge. In the event of an opposite edge on both neighboring bus lines, two secondary inverters are connected in. In the event that no opposite timing edges occur, the signal to be driven remains unchanged.
In this way, it is possible to set a defined, optimum edge steepness of the bus line signal. The optimum edge steepness is optimized with regard to optimum electromagnetic compatibility and also with regard to a maximum clock frequency of the bus system.
It is particularly advantageous if the secondary inverters can be connected in parallel with the main inverter via a controllable switch. The activation is effected in this case by an activating circuit. Consequently, each of the secondary inverters can be connected in with the inverter at the instant of the interference signal that occurs on the corresponding bus line. In a preferred embodiment, a controllable switch is also connected in series with the main inverter. In this way, the bus driver can likewise be inactivated. Bus drivers of this type that can be switched via a controllable switch are also referred to as “enableable” bus drivers.
To make it possible to identify a signal change on the bus lines, a memory for detecting signal changes is connected upstream of each bus driver of a bus line. In a typical and simple embodiment, the memory is realized by a simple flip-flop or a latch. The signal at the input or at the output of the memory is fed to an activating circuit. An activating signal can be tapped on the output of the activating circuit for each of the neighboring capacitively coupled bus lines, which activating signal is fed to the respective controllable switch of the respective secondary inverter. The activating signal characterizes the signal change between the signal to be driven relative to the signal of the corresponding neighboring bus line and thus an interference signal that is coupled in.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a bus driver, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.
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patent: 5390140 (1995-02-01), Tomishima et al.
patent: 5555513 (1996-09-01), Harrington et al.
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patent: 5804987 (1998-09-01), Ogawa et al.
patent: 5804990 (1998-09-01), Popat et al.
patent: 0 608 615 A2 (1994-08-01), None
Japanese Patent Abstract No. 63 155 216 (Kazuhiro), dated Jun. 28
Ehben Thomas
Kunemund Thomas
Römer Dirk
Steinecke Thomas
Greenberg Laurence A.
Infineon - Technologies AG
Lerner Herbert L.
Stemer Werner H.
Tran Anh
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