Bus driver

Details Bus driver Bus driver

1996-02-27

1997-12-16

Westin, Edward P.

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Output switching noise reduction

326 82, 327381, H03K 1716, H03K 1908

Patent

active

056989911

ABSTRACT:
A bus driver includes a plurality of first to m-th buffer circuits for receiving input of an input signal, a delay circuit for delaying the input signal by a predetermined time period, an n-th buffer circuit for receiving input of a delay signal from the delay circuit, a capacitor for selectively receiving input of a predetermined combination of the output signals of the first to m-th buffer circuits, and an output terminal for outputting a signal composed of the output of the capacitor and the output signal of said n-th buffer circuit. As a result of composition of a plurality of signals output from the capacitive portion and the signal output from the n-th buffer circuit, a plurality of output signals each having different rise time and fall time are output from the output terminal.

REFERENCES:
patent: 5124585 (1992-06-01), Kim et al.
patent: 5220216 (1993-06-01), Woo
patent: 5319258 (1994-06-01), Ruetz
patent: 5483188 (1996-01-01), Frodsham
patent: 5576634 (1996-11-01), Kamiya
patent: 5587678 (1996-12-01), Dijkmans

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