Bus data analyzer including a modular bus interface

Details Bus data analyzer including a modular bus interface Bus data analyzer including a modular bus interface

1998-11-23

2001-03-13

Shin, Christopher B. (Department: 2782)

Electrical computers and digital data processing systems: input/

Input/output data processing

Peripheral monitoring

C710S120000, C714S039000

Reexamination Certificate

active

06202103

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Technical Field
This invention generally relates to data analyzers and more specifically relates data analyzers used to monitor bus traffic.
2. Background Art
Computer systems have evolved into extremely sophisticated devices, and computer systems may be found in many different settings. The widespread proliferation of computers prompted the development of computer networks that allow computers to communicate with each other. With the introduction of the personal computer (PC), computing became accessible to large numbers of people. Networks for personal computers were developed that allow individual users to communicate with each other.
Computer systems typically include operating system software that controls the basic function of the computer, and one or more software applications that run under the control of the operating system to perform desired tasks. For example, a typical Personal Computer may run the Windows operating system, and under the control of the Windows operating system, a user may execute an application program, such as a word processor.
Computer systems also include a bus system that is a transmission path on which signals are dropped off or picked up at every attached device. These bus systems generally include an internal bus that connects all the internal computer components to the processor to the main memory, and an expansion bus that enables expansion boards to access the processor and memory. Most modern personal computers also include a local bus that provides a high speed path for video data. Computers also typically include one or more serial ports and one or more parallel ports. The serial ports can be used as a general-purpose interface for almost any type of device, including modems and mice. Parallel ports are commonly used for scanners, printers and other peripherals that require more data throughput.
Recently, computers and other consumer electronics have begun to include new, very fast external bus standard that supports data transfer rates of up to 400 Mbps (400 million bits per second). This bus, typically referred to as the 1394 bus (for the IEEE 1394 standard that defines it) or by the trademarked name FireWire, offers significant improvement over previous external bus designs. For example, a single 1394 port can be used to connect up 63 external devices. In addition to its high speed, 1394 bus also supports isochronous data—delivering data at a guaranteed rate. This makes it ideal for devices that need to transfer high levels of data in real-time, such as video devices. 1394 buses also support both Plug-and-Play and hot plugging, and also provide power to peripheral devices. IEEE 1394 is expected to be used mostly for devices that require large throughput, such as video cameras, scanners, printers, and storage devices.
The IEEE 1394 bus is typically implemented using two chips, a link layer chip and a physical layer chip (generally referred to as a PHY). These two chips together provide the 1394 bus hardware requirements. The link layer chip formats the data into packets. The PHY chip has the physical signaling circuits and logic that are responsible for power-up, initialization, arbitration, bus-reset sensing and data signaling.
Unfortunately, there has been some difficulty in consistently implementing the 1394 bus. In particular, incompatibility between different implementations of the physical layer and link layer chips from different vendors has led to compliance and interoperability problems that are slowing down the further growth of this technology.
Bus data analyzers are tools used to monitor bus traffic to facilitate development and testing of bus systems. For example, developers use data analyzers to monitor buses in order to optimize performance and functionality of the bus. Common tools for this task are data analyzers that have passive bus snooping capability on one hand but are capable of simulating the bus by active data generation on the other hand. Hence, these instruments typically perform a variety of functions, including data capturing, data generation, protocol analysis and event identification. Unfortunately, the flexibility of these data analyzers to work with different bus implementations is limited. In particular, there has been no easy way to test the influence of different combinations of bus chip sets on a device communicating with the bus.
Therefore, without a more flexible and efficient mechanism for analyzing bus traffic data, the task of testing specific devices with multiple bus implementations will continue to be very cumbersome and difficult.
SUMMARY OF THE INVENTION
The preferred embodiment of the present invention provides a data analyzer with a modular bus interface that provides increased flexibility over prior art designs. The modular bus interface allows physical layer devices to be easily swapped, allowing a wide variety of link layer and physical layer device combinations to be tested while minimizing system downtime. In the preferred embodiment, the link layer devices are mounted onto an expansion card that includes a releasable connector. Physical layer devices are mounted onto cards that can plug into the releasable connector. The releasable connector provides the electrical and mechanical connection between the link layer device and the physical layer device, and allows different link layer and physical layer devices to be tested together. By including such a modular bus interface, the preferred embodiment data analyzer provides increased flexibility and performance over prior art systems.
Thus, the preferred embodiment provides a highly flexible, modular measurement device by separating link layer and physical layer device, and locating each on different modular entities. In particular, the preferred embodiment provides physical layer module in which chips from different manufacturers can be used without changing the entire bus interface, allowing the effects of different chip combinations on bus devices to be more easily evaluated. Furthermore, the preferred embodiment uses active data generation capabilities in order to test device performance when stimulated via a multi-vendor bus interface.
The foregoing and other features and advantages of the present invention will be apparent from the following more particular description of the preferred embodiment of the invention, as illustrated in the accompanying drawings.


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3A International, Inc. Brochure “1394 Data Analyzer”.

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