Bus control system and method of controlling bus

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation

Reexamination Certificate

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Details

C710S105000, C710S107000, C710S113000, C710S240000, C710S241000, C713S330000, C713S400000

Reexamination Certificate

active

06917996

ABSTRACT:
An external bus control device2has first and second bus controllers15, 16and an external bus arbiter17. The bus controllers15, 16correspond to devices (for example, SRAM, DRAM) connected to an external bus EXBUS respectively. The bus controllers15, 16respectively output external bus use request signals BRQ1and BRQ2, and obtain the right for using the external bus EXBUS. When the bus controllers15, 16end use of the external bus EXBUS, the bus controllers15, 16stop to output the external bus use request signals BRQ1and BRQ2and output off-time signals OFT1and OFT2immediately thereafter.

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patent: 5918025 (1999-06-01), Hayek et al.
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patent: 6691224 (2004-02-01), Yeh et al.
patent: 6754817 (2004-06-01), Khatri et al.
patent: 2001/0010063 (2001-07-01), Hirose et al.
patent: 2002/0069319 (2002-06-01), Lee et al.
patent: 11-39255 (1999-02-01), None
patent: 2000-66995 (2000-03-01), None
PCI Special Interest Groupt, “PCI Local Bus Bus Specification”, Jun. 1, 1995, Revision 2.1, pp. 26, 81, and 272.

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