Bus communication apparatus for programmable logic devices...

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture

Reexamination Certificate

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Details

C710S310000, C710S315000, C712S037000

Reexamination Certificate

active

07062589

ABSTRACT:
A programmable logic device (PLD) includes programmable logic circuitry and a bridge circuitry. The bridge circuitry includes a first interface circuitry and a first signal select circuitry. The first signal select circuitry couples to the first interface circuitry and the programmable logic circuitry. The bridge circuitry further includes an information interchange circuitry. The first signal select circuitry is configured to selectably provide a communication path between the information interchange circuitry and either the programmable logic circuitry or the first interface circuitry.

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patent: 6286074 (2001-09-01), Batchelor et al.
patent: 6311255 (2001-10-01), Sadana
patent: 6636487 (2003-10-01), Roy
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“FPGA-based modular design for five-level inverter control with optimized pulse patterns” by Hasenkopf et al. (summary only) Publication Date: May 26-29, 2002.

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