Electrical computers and digital processing systems: support – Clock control of data processing system – component – or data...
Reexamination Certificate
2007-04-17
2007-04-17
Perveen, Rehana (Department: 2116)
Electrical computers and digital processing systems: support
Clock control of data processing system, component, or data...
C713S300000, C713S322000, C713S500000, C710S100000, C710S104000, C710S307000, C710S313000, C370S395210, C370S395410, C375S240000, C455S177100, C455S452200
Reexamination Certificate
active
10646079
ABSTRACT:
A frequency manager automatically selects a clock frequency for each device or bus, or for a plurality of devices or buses, in a system, based on various factors and objectives. These factors and objectives can include optimizing performance of the devices without exceeding the system's power/thermal budget. The frequency manager can then control circuits that generate and provide clock signals having the selected frequency(ies) to these devices or buses. For example, in a system that is less than fully populated with devices, embodiments of the invention can select higher clock frequencies than a fully populated system would utilize. Some embodiments of the invention select higher clock frequencies for high-bandwidth devices than for low-bandwidth devices. Other embodiments use information about application programs that will be executed by systems, such as which devices these application programs will frequently access, to select higher clock frequencies for the frequently accessed devices. Yet other embodiments use information about whether the application programs are more memory or I/O intensive to allocate higher clock frequencies to either memory subsystems or I/O subsystems.
REFERENCES:
patent: 5560022 (1996-09-01), Dunstan et al.
patent: 5630110 (1997-05-01), Mote, Jr.
patent: 5630148 (1997-05-01), Norris
patent: 5664165 (1997-09-01), Curry et al.
patent: 5745375 (1998-04-01), Reinhardt et al.
patent: 5754867 (1998-05-01), Walker
patent: 5790877 (1998-08-01), Nishiyama et al.
patent: 5815734 (1998-09-01), Lee et al.
patent: 5918061 (1999-06-01), Nikjou
patent: 5930496 (1999-07-01), MacLaren et al.
patent: 5964879 (1999-10-01), Dunstan et al.
patent: 6070207 (2000-05-01), Bell
patent: 6073244 (2000-06-01), Iwazaki
patent: 6134621 (2000-10-01), Kelley et al.
patent: 6185692 (2001-02-01), Wolford
patent: 6211715 (2001-04-01), Terauchi
patent: 6295568 (2001-09-01), Kelley et al.
patent: 6484222 (2002-11-01), Olson et al.
patent: 6510473 (2003-01-01), Voit
patent: 6513124 (2003-01-01), Furuichi et al.
patent: 6564279 (2003-05-01), Neil et al.
patent: 6714890 (2004-03-01), Dai
patent: 6763478 (2004-07-01), Bui
patent: 6772263 (2004-08-01), Arramreddy
patent: 6782438 (2004-08-01), Duncan et al.
patent: 6948020 (2005-09-01), Bonomo et al.
patent: 6954813 (2005-10-01), Holley et al.
patent: 6963990 (2005-11-01), Allen et al.
patent: 2004/0139363 (2004-07-01), Elbe et al.
patent: 0702308 (1996-03-01), None
patent: 0905630 (1999-03-01), None
patent: 0962867 (1999-12-01), None
patent: 2001-43179 (1999-07-01), None
patent: 2003-108260 (2001-09-01), None
patent: WO 95/35540 (1995-12-01), None
patent: WO 02/099664 (2002-12-01), None
GB Search Report. Application No. GB0417994.1. Dec. 2, 2004.
GB Search Report. Application No. GB0417993.3 Dec. 2, 2004.
Japanese Office Action, JP2004-241,249, Notification of Reason for Rejection, Dated Jan. 9, 2007.
Barr Andrew H.
Espinoza-Ibarra Ricardo
Somervill Kevin M.
Hewlett--Packard Development Company, L.P.
Patel Nitin C.
Perveen Rehana
LandOfFree
Bus clock frequency management based on device load does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Bus clock frequency management based on device load, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Bus clock frequency management based on device load will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3765956