Bus clock controlling apparatus and method

Details Bus clock controlling apparatus and method Bus clock controlling apparatus and method

2006-06-27

2006-06-27

Du, Thuan (Department: 2116)

Electrical computers and digital processing systems: support

Clock, pulse, or timing signal generation or analysis

Correction for skew, phase, or rate

C713S322000

Reexamination Certificate

active

07069463

ABSTRACT:
The present invention relates to an apparatus and method for throttling a clock of a bus used for data exchange between devices in a computer such as a portable computer or notebook. Methods according to the invention can set a throttle rate of a clock to a predetermined initial value, detect a current remaining battery capacity or a current load to the CPU, and adjust the set throttle rate to a prescribed or calculated value according to the detected remaining battery capacity or the CPU load. Thus, power consumption is reduced, and, in the case of a battery-powered computer, battery life and operating time are extended.

REFERENCES:
patent: 5719510 (1998-02-01), Weidner
patent: 6079022 (2000-06-01), Young
patent: 6609211 (2003-08-01), Atkinson
patent: 6694442 (2004-02-01), Yeh
patent: 6704879 (2004-03-01), Parrish

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