Electronic digital logic circuitry – Interface – Current driving
Reexamination Certificate
1999-05-06
2001-02-13
Nelms, David (Department: 2818)
Electronic digital logic circuitry
Interface
Current driving
C326S021000
Reexamination Certificate
active
06188245
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a bus circuit, and more specifically, to a bus circuit which connects a first device and a second device through a transmission line.
In a conventional bus circuit of this type, an output device is connected to a receive device through a transmission line that transmits a signal.
Referring to
FIG. 8
, a conventional bus circuit includes an output buffer
1110
provided in an output device
1100
, a receiver
1210
provided in a receive device
1200
and a transmission line
1300
which connects output buffer
1110
and receiver
1210
.
In output buffer
1110
, an output terminal
1112
is connected to transmission line
1300
. Output buffer
1110
outputs a high logic level signal to transmission line
1300
by forming a current path between a power supply V
DD
and output terminal
1112
. Output buffer
1110
is a complimentary metal oxide semiconductor (CMOS) inverter. Output buffer
1110
includes a positive channel metal oxide semiconductor (PMOS) transistor
1113
and a negative channel metal oxide semiconductor (NMOS) transistor
1114
. PMOS transistor
1113
has a gate terminal to which an input signal is applied and is connected between power supply V
DD
and transmission line
1300
. NMOS transistor
1114
has a gate terminal to which an input signal is applied and is connected between a ground potential GND and transmission line
1300
.
In the receive device
1200
, the input terminal of receiver
1210
is connected to transmission line
1300
. A diode
1220
is provided between the input terminal of receiver
1210
and a power supply V
dd
. Diode
1220
is used for producing a proper waveform of a signal received through transmission line
1300
(hereinafter referred to as first conventional art).
On the other hand, U.S. Pat. No. 5,338,978 discloses a bus circuit in which an output buffer circuit, coupled to a low potential power supply, is connected to an output buffer circuit, coupled to a high potential power supply device, through a transmission line. When the output buffer circuit coupled to the low potential power supply is inactive, a high potential signal may appear on the transmission line driven by the output buffer circuit coupled to the high potential power supply. The bus circuit keeps a pull-up output transistor off. This prevents a current from flowing to the low potential power supply through a pull-up transistor (hereinafter referred to as second conventional art).
In the first conventional art, when power supply V
DD
of output device
1100
is applied and power supply V
dd
of receive device
1200
is not applied, and when PMOS transistor
1113
of output buffer
1110
is on, current flows from power supply V
DD
of output device
1100
to power supply V
dd
of receive device
1200
. This creates a problem because receiver
1210
and diode
1220
can be destroyed if an excessive current flows.
Meanwhile, the second conventional art only addresses a problem appearing when the power supply to the buffer circuit is turned off. This causes a problem because current flowing through the buffer circuit to another device cannot be cut off when power supply is applied to the buffer circuit.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a bus circuit which prevents current from flowing from a power supply of an output device to a power supply of a receive device.
According to one aspect of the present invention, a bus circuit is provided which includes: a first circuit connected to a first power supply; a second circuit connected to a second power supply; a transmission line which connects the first and second circuits; and a third circuit which prevents current from flowing between the first and second power supplies through the transmission line for a predetermined period after the first power supply is applied to the first circuit.
According to another aspect of the present invention, a bus circuit is provided which includes: a transmission line; a first circuit which is connected to a first power supply and outputs a signal to the transmission line; a second circuit which is connected to a second power supply and receives the signal output by the first circuit through the transmission line; and a third circuit which is provided between the o transmission line and the first circuit and which prevents the signal from transmitting from the first circuit to the transmission line for a predetermined period after the first power supply is applied to the first circuit.
According to another aspect of the present invention, a bus circuit is provided which includes: a transmission line; an first circuit comprising an output terminal connected to the transmission line and a path which is formed between a first power supply and the output terminal and is used for outputting a high logic level signal to the transmission line, wherein the output circuit prevents current from flowing on the path for a predetermined period after the first power supply is applied to the first circuit; and a second circuit connected to a second power supply and connected to the output terminal of the first circuit through the transmission line.
REFERENCES:
patent: 5338978 (1994-08-01), Larsen et al.
patent: 5408146 (1995-04-01), Nguyen et al.
patent: 5530392 (1996-06-01), Runas et al.
patent: 5585744 (1996-12-01), Runas et al.
patent: 5818260 (1998-10-01), Kuo
patent: H3-35615 (1991-02-01), None
patent: H3-85040 (1991-04-01), None
patent: H9-6476 (1997-01-01), None
Le Thong
NEC Corporation
Nelms David
Sughrue Mion Zinn Macpeak & Seas, PLLC
LandOfFree
Bus circuit which prevents current from flowing from a power... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Bus circuit which prevents current from flowing from a power..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Bus circuit which prevents current from flowing from a power... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2611752