Bus bridge circuit, bus connection system, and buffer...

Details Bus bridge circuit, bus connection system, and buffer... Bus bridge circuit, bus connection system, and buffer...

2006-04-25

2006-04-25

Ray, Gopal C. (Department: 2111)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus interface architecture

C710S310000, C370S401000, C370S402000

Reexamination Certificate

active

07035957

ABSTRACT:
A PCI bridge circuit connects to first and second PCI buses and performs data transfer between PCI devices. The PCI bridge circuit has a data buffer and controller and the controller70, prior to the establishment of a data transfer state with the first PCI device via the first PCI bus, receives data from the second PCI device via the second PCI bus into a data buffer and inserts a wait state. Consequently while reducing the capacity of the data buffer, data transfer between PCI devices can be performed without affecting the transfer performance.

REFERENCES:
patent: 4972495 (1990-11-01), Blike et al.
patent: 5396597 (1995-03-01), Bodin et al.
patent: 5857082 (1999-01-01), Murdoch et al.
patent: 5905911 (1999-05-01), Shimizu
patent: 6078976 (2000-06-01), Obayashi
patent: 6292873 (2001-09-01), Keaveny et al.
patent: 11-338815 (1999-12-01), None
“The TIME-WAIT state in TCP and its effect on busy servers” by Faber et al. (abstract only) Publication Date: Mar. 21-25, 1999.

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